# R-2R DAC We saw in the previous tutorial about the binary weighted digital-to-analogue converter that the analogue output voltage is the weighted sum of the individual inputs, and that it requires a large range of precision resistors within its ladder network, making its design both expensive and impractical for most DAC’s requiring lower levels of resolution.

We also saw that the binary weighted DAC is based on a closed-loop inverting operational amplifier using summing amplifier topology. While this type of data converter configuration works well for a D/A converter of a few bits of resolution, a much simpler approach is to use a R-2R resistive ladder network to construct a R-2R Digital-to-Analogue Converter which requires only two precision resistances.

The R-2R resistive ladder network uses just two resistor values, one which is the base value “R” and the other which has twice the value, “2R” of the first resistor no matter how many bits are used to make up the ladder network. So for example, we could just use a 1kΩ resistor for the base resistor “R”, and therefore a 2kΩ resistor for “2R” (or multiples thereof as the base value of R is not too critical), thus 2R is always twice the value of R, that is 2R = 2*R. This means that it is much easier to maintain the required accuracy of the resistors along the ladder network compared to the previous weighted resistor DAC. But what is a “R-2R resistive ladder network” anyway.

As its name implies, the “ladder” description comes from the ladder-like configuration of the resistors used within the network. A R-2R resistive ladder network provides a simple means of converting digital voltage signals into an equivalent analogue output. Input voltages are applied to the ladder network at various points along its length and the more input points the better the resolution of the R-2R ladder. The output signal as a result of all these input voltage points is taken from the end of the ladder which is used to drive the inverting input of an operational amplifier.

Then a R-2R resistive ladder network is nothing more than long strings of parallel and series connected resistors acting as interconnected voltage dividers along its length, and whose output voltage depends soley on the interaction of the input voltages with each other. Consider the basic 4-bit R-2R ladder network (4-bits because it has four input points) below.

### 4-bit R-2R Resistive Ladder Network This 4-bit resistive ladder circuit may look complicated, but its all about connecting resistors together in parallel and series combinations and working back to the input source using simple circuit laws to find the proportional value of the output. Lets assume all the binary inputs are grounded at 0 volts, that is: VA = VB = VC = VD = 0V (LOW). The binary code corresponding to these four inputs will therefore be: 0000.

Starting from the left hand side and using the simplified equation for two parallel resistors and series resistors, we can find the equivalent resistance of the ladder network as: Resistors R1 and R2 are in “parallel” with each other but in “series” with resistor R3. Then we can find the equivalent resistance of these three resistors and call it RA for simplicity (or any other form of identification you want). Then RA is equivalent to “2R”. Now we can see that the equivalent resistance “RA” is in parallel with R4 with the parallel combination in series with R5. Again we can find the equivalent resistance of this combination and call it RB. So RB combination is equivalent to “2R”. Hopefully we can see that this equivalent resistance RB is in parallel with R6 with the parallel combination in series with R7 as shown. As before we find the equivalent resistance and call it RC. Again, resistor combination RC is equivalent to “2R” which is in parallel with R8 as shown. As we have shown above, when two equal resistor values are paralled together, the resulting value is one-half, so 2R in parallel with 2R equals an equivalent resistance of R. So the whole 4-bit R-2R resistive ladder network comprising of individual resistors connected together in parallel and series combinations has an equivalent resistance (REQ) of “R” when a binary code of “0000” is applied to its four inputs.

Therefore with a binary code of “0000” applied as inputs, our basic 4-bit R-2R digital-to-analogue converter circuit would look something like this:

### R-2R DAC Circuit with Four Zero (LOW) Inputs The ouput voltage for an inverting operational amplifier is given as: (RF/RIN)*VIN. If we make RF equal to R, that is RF = R = 1, and as R is terminated to ground (0V), then there is no VIN voltage value, (VIN = 0) so the output voltage would be: (1/1)*0 = 0 volts. So for a 4-bit R-2R DAC with four grounded inputs (LOW), the output voltage will be “zero” volts, thus a 4-bit digital input of 0000 produces an analogue output of 0 volts.

So what happens now if we connect input bit VA HIGH to +5 volts. What would be the equivalent resistive value of the R-2R ladder network and the output voltage from the op-amp.

### R-2R DAC with Input VA Input VA is HIGH and logic level “1” and all the other inputs grounded at logic level “0”. As the R/2R ladder network is a linear circuit we can find Thevenin’s equivalent resistance using the same parallel and series resistance calculations as above to calculate the expected output voltage. The output voltage, VOUT is therefore calculated at 312.5 milli-volts (312.5 mV).

As we have a 4-bit R-2R resistive ladder network, this 312.5 mV voltage change is one-sixteenth the value of the +5V input (5/0.3125 = 16) voltage so is classed as the Least Significant Bit, (LSB). Being the least significant bit, input VA will therefore determine the “resolution” of our simple 4-bit digital-to-analogue converter, as the smallest voltage change in the analogue output corresponds to a single step change of the digital inputs. Thus for our 4-bit DAC this will be 312.5mV (1/16th) for a +5V input.

Now lets see what happens to the output voltage if we connect input bit VB HIGH to +5 volts.

### R-2R DAC with Input VB With input VB HIGH and logic level “1” and all the other inputs grounded at logic level “0”, the output voltage, VOUT is calculated at 625mV, and which is one-eighth (1/8th) the value of the +5V input (5/0.625 = 8) voltage. We can also see that it is double the output voltage when only input bit VA was applied, and we would expect this as its the 2nd bit (input) so has double the weighting of the 1st bit.

Now lets see what happens to the output voltage if we connect input bit VC HIGH to +5 volts.

### R-2R DAC with Input VC With input VC HIGH and logic level “1” and the other input bits at logic level “0”, the output voltage, VOUT is calculated at 1.25 volts, and which is one-quarter (1/4) the value of the +5V input (5/1.25 = 4) voltage. Again we can see that this voltage is double the output of input bit VB but also 4 times the value of bit VA. This is because input VC is the 3rd bit so has double the weighting of the 2nd bit and four times the weighting of the 1st bit.

Finally lets see what happens to the output voltage if we connect input VD HIGH to +5 volts.

### R-2R DAC with Input VD With only input VD HIGH and logic level “1” and the other inputs at logic level “0”, the output voltage, VOUT is calculated at 2.5 volts. This is on-half (1/2) the value of the +5V input (5/2.5 = 2) voltage. Again we can see that this voltage is double the output of input bit VC, 4 times the value of bit VB and 8 times the value of input bit VA as it is the 4th bit and therefore classed as the Most Significant Bit, (MSB).

Then we can see that if input VA represents the LSB and therefore controls the DAC’s resolution, and input VB is double VA, input VC is four times greater than VA, and input VD is eight times greater than VA, we can obtain a relationship for the analogue output voltage of our 4-bit digital-to-analogue converter with the following equation:

### Digital-to-Analogue Output Voltage Equation Where the denominator value of 16 corresponds to the 16 (24) possible combinations of inputs to the 4-bit R-2R ladder network of the DAC.

We can expand this equation further to obtain a generalised R-2R DAC equation for any number of digital inputs for a R-2R D/A converter as the weighting of each input bit will always be referenced to the least significant bit (LSB), giving us a generalised equation of:

### Generalised R-2R DAC Equation Where: “n” represents the number of digital inputs within the R-2R resistive ladder network of the DAC producing a resolution of: VLSB = VIN/2n.

Clearly then input bit VA when HIGH will cause the smallest change in the output voltage, while input bit VD when HIGH will cause the greatest change in the output voltage. The expected output voltage is therefore calculated by summing the effect of all the individual input bits which are connected HIGH.

Ideally, the ladder network should produce a linear relationship between the input voltages and the analogue output as each input will have a step increase equal to the LSB, we can create a table of expected output voltage values for all 16 combinations of the 4 inputs with +5V representing a logic “1” condition as shown.

### 4-bit R-2R D/A Converter Output

 Digital Inputs VOUT Expression VOUT D C B A (8*VD + 4*VC + 2*VB + 1*VA)/24 in Volts 0 0 0 0 (0*5 + 0*5 + 0*5 + 0*5)/16 0 0 0 0 1 (0*5 + 0*5 + 0*5 + 1*5)/16 0.3125 0 0 1 0 (0*5 + 0*5 + 2*5 + 0*5)/16 0.6250 0 0 1 1 (0*5 + 0*5 + 2*5 + 1*5)/16 0.9375 0 1 0 0 (0*5 + 4*5 + 0*5 + 0*5)/16 1.2500 0 1 0 1 (0*5 + 4*5 + 0*5 + 1*5)/16 1.5625 0 1 1 0 (0*5 + 4*5 + 2*5 + 0*5)/16 1.8750 0 1 1 1 (0*5 + 4*5 + 2*5 + 1*5)/16 2.1875 1 0 0 0 (8*5 + 0*5 + 0*5 + 0*5)/16 2.5000 1 0 0 1 (8*5 + 0*5 + 0*5 + 1*5)/16 2.8125 1 0 1 0 (8*5 + 0*5 + 2*5 + 0*5)/16 3.1250 1 0 1 1 (8*5 + 0*5 + 2*5 + 1*5)/16 3.4375 1 1 0 0 (8*5 + 4*5 + 0*5 + 0*5)/16 3.7500 1 1 0 1 (8*5 + 4*5 + 0*5 + 1*5)/16 4.0625 1 1 1 0 (8*5 + 4*5 + 2*5 + 0*5)/16 4.3750 1 1 1 1 (8*5 + 4*5 + 2*5 + 1*5)/16 4.6875

Notice that the full-scale analogue output voltage for a binary code of 1111 never reaches the same value as the digital input voltage (+5V) but is less by the equivalent of one LSB bit, (312.5mV in this example). However, the higher the number of digital input bits (resolution) the nearer the analogue output voltage reaches full-scale when all the input bits are HIGH. Likewise when all the input bits are LOW, the resulting lower resolution of LSB makes VOUT closer to zero volts.

## R-2R Digital-to-Analogue Converter

Now that we understand what a R-2R resistive ladder network is and how it works, we can use it to produce a R-2R Digital-to-Analogue Converter. Again using our 4-bit R-2R resistive ladder network from above and adding it to an inverting operational amplifier circuit, we can create a simple R-2R digital-to-analogue converter of:

### R-2R Digital-to-Analogue Converter The digital logic circuit used to drive the D/A converter can be generated by combinational or sequential logic circuits, data registers, counters or simply switches. The interfacing of a R-2R D/A converter of “n”-bits will depend upon its application. All-in-one boards such as the Arduino or Raspberry Pi have digital-to-analogue converters built-in so make interfacing and programming much easier. There are many popular DAC’s available such as the 8-bit DAC0808.

## R-2R D/A Converter Example No1

A 4-bit R-2R digital-to-analogue converter is constructed to control the speed of a small DC motor using the output from a digital logic circuit. If the logic circuit uses 10 volt CMOS devices, calculate the analogue output voltage from the DAC when the input code is hexadecimal number “B”. Also determine the resolution of the DAC.

1). The hexadecimal letter “B” is equal to the number eleven in decimal. The decimal number eleven is equal to the binary code “1011” in binary. That is: B16 = 10112. Thus for our 4-bit binary number of 10112, input bit D = 1, bit C = 0, bit B = 1 and bit A = 1.

If we assume that feedback resistor RF is equal to “R”, then our R-2R D/A converter circuit will look like: The digital logic circuit uses 10 volt CMOS devices, so the input voltage to the R-2R network will be 10 volts. Also being a 4-bit ladder DAC, there will be 24 possible input combinations, so using our equation from above, the ouput voltage for a binary code of 10112 is calculated as: Therefore the analogue output voltage used to control the DC motor when the input code is 10112 is calculated as: -6.875 volts. Note that the output voltage is negative due to the inverting input of the operational amplifier.

2). The resolution of the converter will be equal to the value of the least significant bit (LSB) which is given as: Then the smallest step change of the analogue output voltage, VOUT for a 1-bit LSB change of the digital input of this 4-bit R-2R digital-to-analogue converter example is: 0.625 volts. That is the output voltage changes in steps or increments of 0.625 volts and not as a straight linear value.

## 4-bit Binary Counting R-2R DAC

Hopefully by now we understand that we can make a R-2R ladder DAC using just two resistor values, one the base value “R” and the other twice or double the value being “2R”. In our simple example above we have made a 4-bit R-2R DAC with four input data lines, A, B, C, and D giving us 16 (24) different input combinations from “0000” to “1111”. The binary code for these four digital input lines can be generated in many different ways, using micro-controllers, digital circuits, mechanical or solid state switches. But one interesting option is to use a 4-bit binary counter such as the 74LS93.

The 74LS93 is a 4-bit J-K ripple counter which can be configured to count-up from 00002 to 11112 (MOD-16) and reset back to zero (0000) again by the application of a single external clock signal. The 74LS93 is an asynchronous counter commonly called a “ripple” counter because of the way that the internal J-K bistables respond to the clock or timing input producing a 4-bit binary output. The frequency (or period) of this external clock or timing pulse is divided by a factor of 2, 4, 8, and 16 by the counters output lines as the clock pulse appears to ripple through the four J-K flip-flops producing the required 4-bit output count sequence from 00002 to 11112.

### 4-bit Binary Counting R-2R DAC Note that to count upwards from 0000 to 1111, the external CLKB input must be connected to the QA (pin-12) output and the input timing pulses are applied to input CLKA (pin-14).

This simple 4-bit asynchronous up counter built around the 74LS93 binary ripple counter as the same counting sequence given in the above table. On the application of a clock pulse the outputs: QA, QB, QC, and QD change by one step. The input of the operational amplifier detects this step change and outputs a negative voltage (inverting op-amp) relative to the binary code at the R-2R ladder inputs. The output voltage value for each step will correspond to that given in the table above.

The ripple counter will count up in sequence with the four outputs producing an output sequence of binary values upto the 15th clock pulse where the outputs are set to 11112 (decimal 15) producing the maximum negative output voltage of the digital-to-analogue converter. On the 16th pulse the counters output sequence is reset and the count returns back to 0000, which resets the op-amps output back to zero volts. The application of the next clock pulse begins a new counting cycle from zero to VOUT(max).

We can show the output sequence for this simple 4-bit binary asynchronous counting R-2R D/A converter in the following timing diagram.

### 4-bit R-2R DAC Timing Diagram Clearly then, the output voltage of the operational amplifier varies from zero volts to its maximum negative voltage as the ripple counter counts from 00002 to 11112 respectively. This simple circuit could be used to vary the brightness of a lamp connected to the op-amps output, or continually vary the speed of a DC motor from slow to fast, and back to slow again at a rate determined by the clock period.

Here the ripple counter and R-2R DAC are configured for 4-bit operation but using commonly available binary ripple counters such as the CMOS 4024 7-bit (÷128), the CMOS 4040 12-bit (÷4096) or the larger CMOS 4060 14-bit (÷16,384) counter and adding more input resistors to the R-2R ladder network such as those available from Bournes, the resolution (LSB) of the circuit can be greatly lowered producing a smoother output signal from the R-2R digital-to-analogue converter.

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